1. Field of the Invention
The present invention relates to a semiconductor device produced in substantially the same size as the semiconductor chip packaged therein, a process of producing the semiconductor device, a dissolvable metal sheet to be used in the process, and a process for producing the metal sheet.
2. Description of the Related Art
As shown in FIG. 1, U.S. Pat. No. 5,476,211 discloses a chip size package (CSP) or a semiconductor device produced in substantially the same size as the semiconductor chip packaged therein, in which a semiconductor chip 10 has an electrode terminal carrying surface on which electrode terminals formed on an extension of the electrode terminals are formed and carried and an S-shaped wire 14 is bonded to the electrode terminal. The wire 14 is bonded on one end to the electrode terminal 12 by wire bonding, worked to an S-shape, and then cut on the other hand at a selected height. The cut end or the free tip of the wire 14 is bonded to terminals of a mother board to mount the chip 10 on the mother board, during which the S-shaped wire 14 absorbs the thermal or other stresses. The wire 14 may have a plated coating thereon, for strengthening, to maintain the initial S-shape during processing.
The prior art semiconductor device provides a simple structure enabling a chip size package to be produced using no interposers to support lead assemblies while mitigating thermal stress.
However, the prior art structure has the following problems.
First, the wires 14 must be individually bonded to the electrode terminals 12 and worked to the S-shape to form each lead assembly, which process limits improvement in the productivity and raises the production cost.
It is also technologically difficult to stably form an S-shape by wire bonding process and to provide a constant height of the tip 16.
Wire bonding of the wire 14 may damage an active surface of the semiconductor chip 10.
Plating of the wire 14 may cause a short-circuit to occur in the conductor wiring pattern formed on the surface of the semiconductor chip 10. This is because the electrode terminals 12 formed on an electrode terminal carrying surface of the semiconductor chip 10 are electrically connected to the semiconductor chip 10 via a conductor wiring pattern formed on a passivation film, in which the conductor wiring is not covered by the passivation film and is at a high density.